DSNoC is a workshop devoted to Diagnostic Services in Network-on-Chips. DSNoC’11 is the fifth edition of this workshop and is organized in conjunction with the 48th ACM/EDAC/IEEE Design Automation Conference (DAC).
Network-on-Chips (NoCs) are settling as a new on-chip communication paradigm. Diagnostic services, such as test, debug, and on-line monitoring, are becoming important factors in designing next-generation NoC-based systems. The NoC infrastructure itself requires diagnostic services, and can also be used to support those for the entire system. Although significant research has been done in NoC design, there are many open and pressing issues regarding diagnostic services. The focus of this workshop is to explore them and their implications on system design.
The workshop program will contain keynote and invited talks, paper and poster sessions as well as a panel discussion. This year's focus will be set on test, debug and on-line monitoring of 3D Network-on-Chips.
Program highlights:
- Keynote talk:
- Embedded support for in-system diagnostic services
Nicola Nicolici - McMaster University, Canada
- Invited talks:
- Intel post silicon debug challenges over generation changes
Bill Penner - Intel Cooperation Seatle, US - Fault- and Defect-Tolerant Computation and Communication in Self-assembled Network-on-Chip
Christof Teuscher - Portland State University, US - Resilient On-Chip Communication in MPSoC Through Network Reconfiguring
Yinhe Han - Chinese Academy of Science, China - Answer from Nature: Addressing the Challenges of Fault-Tolerance and Integration of Emerging On-Chip Interconnects in NoCs
Amlan Ganguly - Rochester Institute of Technology, Rochester, USA
- Panel discussion: "Test and Reliability Challenges in 3D NoCs"
- Moderator: Qiang Xu - The Chinese University of Hong Kong, Hong Kong
- Panelists:
Fabien Clermidy - Centre of Atomic Energy (CEA) Grenoble, France
Saeed Shamshiri - University of California, Santa Barbara, USA
W. Rheet Davis - North Carolina State University, Raleigh, NC, USA
